1. General Description

1.1 Course Objectives

After completing the course the student will:

1. Program device driver invoked by interrupts.

2. Program in Assembly language.

3. Understanding high-level and Assembly language relations.

4. Implement data-structures to exchange data between concurrent programs.

5. Understand software-Hardware interface.

6. Understanding architectural concept and their relation to performance and programming.

1.2 Prerequisite

1. At least 1 year of experience in high level language programming.

2. Knowledge of digital design.

1.3 Course Organization

The course is composed of:

1. Lectures in which the theory is given.

2. Workshops in which the process of analyzing given designs and understanding their semantics, is performed.

3. Practical exercising.

This document describes: The subjects and the exercises to be given course.

2. Course Subjects

2.1 Introduction to AltiVec Architecture

2.1.1 Lecture

1. What is PowerPC architecture ?

2. Architectural classification schemes:

· SISD: Single Instruction, Single Data.

· SIMD: Single Instruction, Multiple Data.

· MIMD: Multi Instruction, Multi Data.

3. What is the AltiVec architecture ?

2.1.2 Workshop

N/A.

2.1.3 Practical Exercising

Running simple programs.

2.2 PowerPC Computation Model

2.2.1 Lecture

1. Programming Model.

2. Structure of the PowerPC.

3. Pipeline and Parallel operations:

o Tomassulu algorithm.

o Branch predictor.

2.2.2 Workshop

Calculation of estimated performance.

2.2.2.1 Practical Exercising

Running a simple program in two versions:

1. A version that disables the usage of parallelism imposed by the Tomassulo.

2. A version, which utilizes the mentioned above parallelism.

2.3 Memory Orgarnization

2.3.1 Lecture

· Memory Hierarchy

· Addressing modes

· Physical and logical addresses.

· Programming the Cache memory.

2.3.2 Workshop

· Calculating physical addresses.

· Special register usage.

· Programming using C++ and embedded assembly lines.

2.3.3 Practical Exercising

· Programming the cache memory, and measuring performance.

· Static, and Automatic variables and their impact on performance.

2.4 Peripheral I/O

2.4.1 Lecture

· Timer.

· Direct Memory Access (DMA).

· Parallel Communication.

· Serial Communication: Synchronous/Asynchronous.

2.4.2 Workshop

· SW/HW interface with the I/O peripherals.

· Programming the timer to produce tones.

· Reading data-sheets of the peripherals.

2.4.3 Practical Exercising

· 1. Programming timer for various needs.

· 2. Programming the Timer and counting the elapsed time.

2.5 Interrupt and exceptions

1. What is an interrupt: Hardware/Software interface.

2. Synchronization primitives

3. Programming the interrupt controller.

4. Interrupt handling:

· Critical section.

· Semaphore.

· Cyclic Queue.

2.5.1 Workshop

· Interrupt Handling.

· Synchronization primitives.

2.5.2 Practical Exercising

Communication project between two computers.

3. Allocation of Hours

Subject	Lecture	Workshop	Practical Exercising	Total
Introduction to AltiVec Architecture	4	1	3	8
PowerPC Computation Model	4	2	4	10
Memory Orgarnization	4	4	4	12
Peripheral I/O	8	4	2	14
Interrupt and exceptions	8	4	4	16
Defense of the Final Project[1]	4			4
Total	32	15	17	64

[1] The students perform this project as home-work.