AltiVec Course Syllabus

1. General Description

1.1 Course Objectives

After completing the course the student will:

1.      Program in AltiVec technology.

2.      Program in Assembly language.

3.      Understanding architectural concept and their relation to performance and programming.

1.2 Prerequisite

  1. At least 1 year of experience in high level language programming.
  2. At least 1 year of experience in Assembly programming.
  3. Knowledge of digital design.
  4. Knowledge of the PowerPC architecture.

1.3 Course Organization

The course is composed of:

1. Lectures in which the theory is given.

2. Workshops in which the process of analyzing given designs and understanding their semantics, is performed.

3. Practical exercising.

This document describes: The subjects and the exercises to be given course.

2. Course Subjects

2.1 Introduction to AltiVec Architecture

2.1.1 Lecture

1.      Architectural classification schemes:

·         SISD: Single Instruction, Single Data.

·         SIMD: Single Instruction, Multiple Data.

·         MIMD: Multi Instruction, Multi Data.

2. What is the AltiVec architecture?

3. Instruction Set.

4. Standard Library Interface.

2.1.2 Workshop

Given a program, performing vector computations, we shall analyze:

1.      Code produced for a regular computer.

2.      Code produced for AltiVec.

3.      Timing aspects.

2.1.3 Practical Exercising

1. Running simple programs.

2.2 Computation Model

2.2.1 Lecture

1.      Programming Model.

2.      PowerPC and its interface to AltiVec.

3.      Pipeline and Parallel operations:

o       Tomassulu algorithm.

o       Branch predictor.

2.2.2 Workshop

1. Calculation of estimated performance.

2. Coding style to utilize Pipeline and Parallel operations.

2.2.2.1 Practical Exercising

Running a simple program in two versions:

1.      A version that disables the usage of parallelism imposed by the Tomassulo.

2.      A version, which utilizes the mentioned above parallelism.

3.      Using Branch prediction mechanism.

2.3 Memory Organization

2.3.1 Lecture

1.      Memory Hierarchy

2.      Addressing modes.

3.      Alignment.

4.      Physical and logical addresses.

5.      Programming the Cache memory.

2.3.2 Workshop

1.      Calculating physical addresses.

2.      Special register usage.

3.      Programming using C++ and embedded assembly lines.

2.3.3 Practical Exercising

  1. Programming the cache memory, and measuring performance.
  2. Static, and Automatic variables and their impact on performance.

 

2.4 Peripheral I/O[1]

2.4.1 Lecture

1.      Timer.

2.      Direct Memory Access (DMA).

3.      Parallel Communication.

4.      Serial Communication: Synchronous/Asynchronous.

2.4.2 Workshop

1.      SW/HW interface with the I/O peripherals.

2.      Programming the timer to produce tones.

3.      Reading data-sheets of the peripherals.

2.4.3 Practical Exercising

1. Programming Timer for various needs.

2. Programming the Timer and counting the elapsed time.

 

2.5  Interrupt and exceptions

1.      Interrupt.

2.      Exception. What is an interrupt: Hardware/Software interface.

2.5.1 Workshop

1.      Debug using exceptions.

2.      Exception handling.

2.5.2 Practical Exercising

 

Final project summarizing most of the subjects covered in the course.

 

3. Allocation of Hours

Total

Practical Exercising

Workshop

Lecture

Subject

8

3

1

4

Introduction to AltiVec Architecture

10

4

2

4

Computation Model

12

4

4

4

Memory Organization

14

2

4

8

Peripheral I/O

16

4

4

8

Interrupt and exceptions

4

 

 

4

Defense of the Final Project[2]

64

17

15

32

Total

 


[1] Card Dependent.

[2] The students perform this project as home-work.